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Randal Bryant
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#	Item
11	CS:APP Web Aside DATA:BOOL: More on Boolean Algebra and Boolean Rings∗ Randal E. Bryant David R. O’Hallaron June 5, 2012 Add to Reading List Source URL: csapp.cs.cmu.edu Language: English - Date: 2012-06-05 05:37:34 Algebra Mathematics Boolean algebra Abstract algebra Boolean ring Distributive property Boolean Negation Logical connective Propositional calculus Boolean algebras canonically defined Zhegalkin polynomial
12	Term-Level Verification of a Pipelined CISC Microprocessor Randal E. Bryant December, 2005 CMU-CS Add to Reading List Source URL: www.cs.cmu.edu Language: English - Date: 2006-01-09 17:18:43 Computer architecture Computing Computer hardware Central processing unit Classes of computers Instruction set architectures Microprocessors Instruction pipelining Reduced instruction set computing Program counter Instruction set Processor design
13	CS:APP2e Web Aside ASM:SSE: SSE-Based Support for Floating Point∗ Randal E. Bryant David R. O’Hallaron August 5, 2014 Add to Reading List Source URL: csapp.cs.cmu.edu Language: English - Date: 2014-08-05 12:50:10 Computer architecture Computing X86 instructions Computer engineering Streaming SIMD Extensions SSE2 MMX X86 MOVAPD X87 Processor register SSE3
14	Introducing Computer Systems from a Programmer’s Perspective Randal E. Bryant Carnegie Mellon University Computer Science Add to Reading List Source URL: csapp.cs.cmu.edu Language: English - Date: 2010-02-10 14:30:16 Computing Software engineering Software Programming languages Computer programmers Central processing unit Programmer Computer Assembly language Program optimization Parallel computing Educational technology
15	CS:APP2e Web Aside MEM:BLOCKING: Using Blocking to Increase Temporal Locality∗ Randal E. Bryant David R. O’Hallaron June 5, 2012 Add to Reading List Source URL: csapp.cs.cmu.edu Language: English - Date: 2012-06-05 05:40:07 Compiler optimizations Numerical linear algebra Cache Computer memory Locality of reference Software optimization Matrix multiplication Loop optimization Matrix Array data type Loop nest optimization Loop tiling
16	CS:APP2e Web Aside ASM:EASM: Combining Assembly Code with C Programs∗ Randal E. Bryant David R. O’Hallaron June 5, 2012 Add to Reading List Source URL: csapp.cs.cmu.edu Language: English - Date: 2012-06-05 05:37:19 X86 architecture Assembly languages Inline assembler X86 instructions Low-level programming language INT X86-64 X86 Exit X Sharp X86 assembly language
17	CS:APP2e Web Aside ARCH:VLOG Verilog Implementation of a Pipelined Y86 Processor∗ Randal E. Bryant David R. O’Hallaron June 5, 2012 Add to Reading List Source URL: csapp.cs.cmu.edu Language: English - Date: 2012-06-05 05:37:00 Hardware description languages Electronic design automation Verilog Digital electronics Field-programmable gate array High-level synthesis Verilog-AMS SystemVerilog
18	CS:APP Web Aside DATA:TMIN: Writing TMin in C∗ Randal E. Bryant David R. O’Hallaron June 5, 2012 Add to Reading List Source URL: csapp.cs.cmu.edu Language: English - Date: 2012-06-05 05:37:35 C Data types Sizeof Integer Signedness Type punning C data types
19	Semantics-Aware Malware Detection Mihai Christodorescu∗ Somesh Jha∗ University of Wisconsin, Madison {mihai, jha}@cs.wisc.edu Sanjit A. Seshia† Dawn Song Randal E. Bryant† Add to Reading List Source URL: uclid.eecs.berkeley.edu Language: English - Date: 2011-01-27 21:52:26
20	To appear at ICSE’05 Automatic Discovery of API-Level Exploits Vinod Ganapathy , Sanjit A. Seshia , Somesh Jha , Thomas W. Reps , Randal E. Bryant Add to Reading List Source URL: uclid.eecs.berkeley.edu Language: English - Date: 2011-01-27 21:52:26